The present invention relates to a method for manufacturing a chip fuse and to a chip fuse.
Fuses are used in order to prevent occurrence of circuit breakdown due to an inflow of excess current caused by a failure, or the like, in an electronic device. Recently, with the miniaturization of devices, chip fuses have been employed that are easily surface-mounted on wiring boards, etc., and that excel in high-volume production. In a chip fuse, a fuse element made of a metal foil is formed on an insulating substrate, such as a ceramic substrate, etc., (hereinafter, also simply referred to as a substrate).
It has been requested, in chip fuses, to reduce a melting current that melts the fuse element (to, for example, 100 mA or less); namely, to reduce the capacity. Various proposals have been made in order to respond to such request.
For example, Japanese Unexamined Patent Application Publication No. 2005-505110 discloses a fuse in which a tin core is surrounded by a silver casing. In addition, Japanese Unexamined Patent Application Publication No. 2009-509308 discloses a fuse in which tin is coated over a copper fuse link. With the technology of Japanese Unexamined Patent Application Publication No. 2005-505110 and Japanese Unexamined Patent Application Publication No. 2009-509308, when the fuse element melts, tin with a low melting point melts first, becomes diffused in silver or copper, and lowers a melting point of the fuse element, and thus, the melting current of the fuse may be reduced.
Moreover, Japanese Unexamined Patent Application Publication No. 2007-095592 discloses the technology by which a fuse part is formed on a silicone substrate and a hollow part is formed directly under the fuse part of the substrate by means of etching. Since heat loss to the substrate can be reduced by forming the hollow part, a reduction in the melting current of the fuse may be expected.
However, with the technology of Japanese Unexamined Patent Application Publication No. 2005-505110 and Japanese Unexamined Patent Application Publication No. 2009-509308, the manufacturing cost increases due to the multilayered structures. Moreover, there is a risk that tin may be diffused unnecessarily in silver or copper. Furthermore, with the technology of Patent Document 3, there is a risk that the chip fuse cost increases since significant man-hours are needed for the process of etching the substrate.
In addition, a rush current (also referred to as an inrush current) is known to occur at the time of switching on and/or off the power supply to the circuit. Accordingly, as to the chip fuse, it is required that it melts when an abnormal current flows therethrough but that it tolerates and does not melt when the rush current occurs at the time of switching on and/or off the power supply (in other words, it is required that it has a high rush resistance).